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Espressif Systems /ESP32-P4 /MCPWM0 /EVT_EN2

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Interpret as EVT_EN2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (EVT_OP0_TEE1_EN)EVT_OP0_TEE1_EN 0 (EVT_OP1_TEE1_EN)EVT_OP1_TEE1_EN 0 (EVT_OP2_TEE1_EN)EVT_OP2_TEE1_EN 0 (EVT_OP0_TEE2_EN)EVT_OP0_TEE2_EN 0 (EVT_OP1_TEE2_EN)EVT_OP1_TEE2_EN 0 (EVT_OP2_TEE2_EN)EVT_OP2_TEE2_EN

Description

Event enable register2

Fields

EVT_OP0_TEE1_EN

Configures whether or not to enable PWM generator0 timer equal OP0_TSTMP_E1_REG event generate.\0: Disable\1: Enable
EVT_OP1_TEE1_EN

Configures whether or not to enable PWM generator1 timer equal OP1_TSTMP_E1_REG event generate.\0: Disable\1: Enable
EVT_OP2_TEE1_EN

Configures whether or not to enable PWM generator2 timer equal OP2_TSTMP_E1_REG event generate.\0: Disable\1: Enable
EVT_OP0_TEE2_EN

Configures whether or not to enable PWM generator0 timer equal OP0_TSTMP_E2_REG event generate.\0: Disable\1: Enable
EVT_OP1_TEE2_EN

Configures whether or not to enable PWM generator1 timer equal OP1_TSTMP_E2_REG event generate.\0: Disable\1: Enable
EVT_OP2_TEE2_EN

Configures whether or not to enable PWM generator2 timer equal OP2_TSTMP_E2_REG event generate.\0: Disable\1: Enable

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data